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  18-channel gamma buffer with regulator ADD8708 rev. 0 in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . features 18 precision gamma reference outputs mask-programmable gamma resistors: 0.2% resolutio n and 0.1% accuracy mask-programmable voltage regulator: 0.4% accuracy upper 9 buffers swing to v dd lower 9 buffer s swing to gnd single-supply operation: 7.5 v to 16.5 v gamma curren t drive: 15 ma per channel peak output cu rrent: 150 m a output voltage stable under l o ad conditions pin-to-pin compatible with a dd87 09 48-lea d , pb-fr e e lqfp and lfc s p applic ati o ns lcd tv panels lcd monitor panels general description the ad d8708 is a n 18-c h a n ne l in teg r a t e d ga mma r e f e r e n c e f o r us e in h i g h r e s o l u t i o n lc d t v a nd m o ni to rs p a nels. t h e o u t- p u t b u f f ers fe a t ur e hig h c u r r e n t dr i v e and lo w o f fs et v o l t a g e t o pro v i d e an a c c u r a te a n d st abl e g a m m a c u r ve. t h e top n i ne cha nnels s w in g to v dd ; t h e lo w e r nine cha n nels swi n g to g n d . i n teg r a t in g t h e ga mma s e t u p r e sis t o r s dras tical l y r e d u ces the e x t e rn al co m p o n en t co un t wh ile in cr ea s i n g t h e ga m m a cur v e acc u r a c y . t o acco mm o d a t e m u l t i p le col u mn dr ivers a nd p a nel a r c h i t ec t u r e s, t h e ad d8708 is mas k p r og ra mma b le t o a 0.2 % re s o lut i on u s i n g t h e o n - c h i p 5 0 0 re s i stor st r i ng . a n on - b o a rd v o l t a g e r e gu l a t o r p r o v ides a f i xe d i n p u t fo r t h e r e sis t o r s t r i n g , is ola t in g t h e gamma c u r v e f r o m t h e s u p p l y r i p p le . the ad d8708 is s p ecif ie d o v er th e t e m p era t ur e ra n g e o f C40 c t o +105 c a nd com e s in bo t h a 48-l e ad , pb-f r e e , le ad-f ram e ch i p -s ca l e p a ck a g e and a p b -f r e e , lo w-p r o f i l e , q u a d f l a t p a ckage. func tio n a l block di agram 04614-001 gnd gnd v dd v dd v out 18 gamma buffers v in 18 gnd 1.2v + ? mask-programmable regulator resistors mask-programmable resistor string v out 17 v in 17 v out 16 v in 16 v out 15 v in 15 v out 14 v in 14 v out 13 v in 13 v out 12 v in 12 v out 11 v in 11 v out 10 v in 10 v out 9 v in 9 v out 8 v in 8 v out 7 v in 7 v out 6 v in 6 v out 5 v in 5 v out 4 v in 4 v out 3 v in 3 v out 2 v in 2 v out 1 v in 1 fb v reg out 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * 700 ? * *esd protection resistors f i g u re 1. 48-l e ad l qfp or l f csp
ADD8708 rev. 0 | page 2 of 16 table of contents electrical characteristics ................................................................. 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ............................................. 7 application notes ........................................................................... 10 tap point selection ..................................................................... 10 volt age regu l ator ....................................................................... 11 maximum power dissipation ................................................... 11 land pattern ................................................................................ 11 operating temperature range ................................................. 12 typical applications circuit .......................................................... 14 tap point and regulator voltage request form ......................... 15 outline dimensions ....................................................................... 16 ordering guide ........................................................................... 16 revision history 10/04revision 0: initial version
ADD8708 rev. 0 | page 3 of 16 electrical characteristics v dd = 16 v, t a @ 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit gamma curve characteristics accuracy r acc 1 0.1 0.4 % programming resolution r res 500 segments 0.2 % total resistor string r total 15 k? buffer characteristics outputs output voltage range (ch18 to ch10) v out i l = 100 a 1.4 v dd v output voltage range (ch9 to ch1) v out i l = 100 a 0 v dd ? 1.4 v output vs. load (ch18, ch17, ch2, ch1) ?v out 2 i l = 20 ma 15 mv output vs. load (ch16 to ch3) ?v out 2 i l = 5 ma 5 mv inputs offset voltage v os 5 15 mv offset voltage drift ?v os /?t ?40c t a +105c 20 v/c input bias current i b ?40c t a +105c 0.5 1.5 a input voltage range (ch18 to ch10) v in 1.4 v dd v input voltage range (ch9 to ch1) v in 0 v dd ? 1.4 v dynamic performance slew rate sr r l = 10 k?, c l = 200 pf 4 6 v/s bandwidth bw C3 db, r l = 10 k?, c l = 200 pf 4.5 mhz settling time to 0.1% t s 1 v, r l = 10 k?, c l = 200 pf 1.1 s phase margin o r l = 10 k?, c l = 200 pf 55 degrees power supply rejection ratio psrr v dd = 7 v to 17 v, ?40c t a +105c 68 90 db voltage regulator programmable range v reg out 5 v dd ? 0.6 v initial regulator accuracy v acc no load; v reg out = 14.4v 0.4 1.5 % dropout voltage v do i l = 100 a 100 150 mv i l = 5 ma 310 350 mv line regulation reg line v in = 8.5 v to 16.5 v, v out = 8 v 0.01 0.20 %/v load regulation reg load i o = 100 a to 10 ma 0.02 0.10 %/ma maximum load current i o ?40c t a +105c 5 ma feedback reference voltage v ref 1.2 v feedback input bias current i b fb ?40c t a +105c -150 10 150 na system accuracy total error 3 , 4 v total error ?40c t a +105c 0.5 3 % power supply supply voltage v dd 7.5 16 v supply current i sy no load; ?40c t a +105c 9.5 16 ma 1 gamma curve accuracy includes resistor matching an d buffer errors, but excl udes the regulator error. 2 ?v out is the shift from the desired output voltage under the specified current load. 3 total error is the difference between the designed and actual output voltage divided by the actual regulator output voltage or full-scale voltage. 4 total error includes regulator error, resistor string error, bias current ef fects, and buffer offset voltage.
ADD8708 rev. 0 | page 4 of 1 6 absolute maximum ratings table 2. p a r a m e t e r r a t i n g supply voltage (v dd ) 1 8 v input voltage ? 0.5 v to v dd storage temperature range ? 65c to +150c operating temperature range 1 ? 40c to +105c junction tempe r ature range C65c to +150c lead temperature range (soldering, 60 sec) 300c esd tolerance (hbm) 1500 v esd tolerance (mm) 200 v table 3. packa g e characteristics package type ja 2 ja 3 unit lfcsp (cp ) 28.3 47.7 c/w lqfp (st) n/a 74.57 c/w 1 see the s e ctio n. a ppl icatio n no te s 2 ja f o r expos e d pa d sol d er ed t o j e d e c 4- la yer boa r d. 3 ja fo r e x po se d pad no t s o l d e re d do wn. s t r e s s es a b o v e t h os e list e d u nde r a b s o l u te m a xim u m r a t i n g s ma y ca us e p e r m a n e n t dama ge to t h e de vi ce. t h is is a st r e ss r a t i ng on ly ; f u n c t i on a l op e r at i o n of t h e d e v i c e a t t h e s e or an y o t h e r con d i t ions a b o v e t h o s e i ndic a te d i n t h e op er a t io na l s e c t io n s o f t h is sp e c if ic a t ion is n o t im pli e d . e x p o sur e t o ab s o lute m a x i m u m r a t i ng c o nd it i o ns for e x te nd e d p e r i o d s m a y af fe c t d e v i c e rel i a b i l it y . esd caution esd (electrostatic discharge) sensitive device. ele c tros tatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharge wi thout detection. although this product features proprietary esd protection circu i try, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore, prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity.
ADD8708 rev. 0 | page 5 of 1 6 pin conf iguration and fu nction descriptions 04614-002 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 v out 10 v out 9 v out 8 v out 7 v dd gnd v out 6 v out 5 v out 4 v out 3 v out 2 v out 1 v in 10 v in 9 v in 8 v in 7 v in 6 v in 5 v in 4 v in 3 v in 2 v in 1 gnd v dd v dd gnd v out 18 v out 17 v out 16 v out 15 v out 14 v out 13 v dd gnd v out 12 v out 11 1 2 3 4 5 6 7 8 9 10 11 12 reg fb gnd v dd v reg out v in 18 v in 17 v in 16 v in 15 v in 14 v in 13 v in 12 v in 11 ADD8708 top view (not to scale) f i gure 2. pin config ur ation ta ble 4. pi n f u nct i on d e s c ri pt i o ns pin o. ame description 1 r e g fb regulator feedback. com p are s a percentage of th e regulator output to the internal 1.2 v voltage reference. inter n al resi stors ar e used to program the desired regulator output v o ltage. 2 gnd ground. normally 0 v. 3 v dd supply voltage. normally 16 v. 4 v reg ou t regulator output voltage. provides reference v o ltage to resisto r string and is internally con n ect e d to the top of the resistor string. 5 v in 18 6 v in 17 7 v in 16 8 v in 15 9 v in 14 1 0 v in 13 1 1 v in 12 1 2 v in 11 1 3 v in 10 1 4 v in 9 1 5 v in 8 1 6 v in 7 1 7 v in 6 1 8 v in 5 1 9 v in 4 2 0 v in 3 2 1 v in 2 2 2 v in 1 buffer inputs. normally floating. 1 23 gnd ground. normally 0 v. 2 4 v dd supply voltage. normally 16 v. 1 e x ternal res i s t ors c a n be ad ded to mod i f y the internal resis t or s t ring to change the gamma vol t age. a n external resis t or cal c u lator is av ailable upon reque s t fr om yo ur loca l sa l e s o ffi ce.
ADD8708 rev. 0 | page 6 of 16 pin no. name description 25 v out 1 26 v out 2 27 v out 3 28 v out 4 29 v out 5 30 v out 6 buffer outputs. these buffers can swing to ground. 31 gnd ground. normally 0 v. 32 v dd supply voltage. normally 16 v. 33 v out 7 34 v out 8 35 v out 9 buffer output. these buffers can swing to ground. 36 v out 10 37 v out 11 38 v out 12 buffer output. these buffers can swing to v dd . 39 gnd ground. normally 0 v. 40 v dd normally 16 v. 41 v out 13 42 v out 14 43 v out 15 44 v out 16 45 v out 17 46 v out 18 buffer outputs. these buffers can swing to v dd . 47 gnd ground. normally 0 v. 48 v dd supply voltage. normally 16 v.
ADD8708 rev. 0 | page 7 of 1 6 typical perf orm ance cha r acte ristics 20 ?3 5 ?3 0 ?2 5 ?2 0 ?1 5 ?1 0 ?5 0 5 10 15 ? 2 0 ? 1 0 0 1 02 03 04 05 0 6 07 08 09 0 1 0 0 1 1 0 1 2 0 04614-003 temperature ( c) outp ut v o ltage e rror (mv ) i sink = 15ma i sink = 5ma i load = 0ma i sink = 25ma i source = 5ma i source = 15ma i source = 25ma f i gure 3. o u tput v o ltage e r ror v s . t e m p er atu r e 30 25 20 15 10 5 0 0.1 1 1 0 100 04614-004 load current (ma) outp ut v o ltage e rror (mv ) ch17 sink ch17 source ch18 source ch18 sink f i gure 4. o u tput v o ltage e r ror v s . l oad c u rrent ( c h a nne ls 17 and 18) 30 25 20 15 10 5 0 0.1 1 1 0 100 04614-005 load current (ma) outp ut v o ltage e rror (mv ) ch16 sink ch10 source ch16 source ch10 sink f i gure 5. o u tput v o ltage e r ror v s . l oad c u rrent ( c h a nne ls 10 and 16) 25 20 15 10 5 0 0.1 1 1 0 100 04614-006 load current (ma) outp ut v o ltage e rror (mv ) ch3 sink ch9 source ch3 source ch9 sink f i gure 6. o u tput v o ltage e r ror v s . l oad c u rrent ( c h a nne ls 3 and 9) 25 20 15 10 5 0 0.1 1 1 0 100 04614-007 load current (ma) outp ut v o ltage e rror (mv ) ch1 sink ch1 source ch2 source ch2 sink f i gure 7. o u tput v o ltage e r ror v s . l oad c u rrent ( c h a nne ls 1 and 2) 11 10 9 8 7 6 5 4 3 2 1 0 ?200 1800 1600 1400 1200 1000 800 600 400 200 0 04614-008 time (ns) amp l itude (v ) 10v pulse 120pf 10nf 1nf 520pf 320pf f i gur e 8 . g a mma buffer s t r a n sient l o a d resp onse vs . c a pa ci ti v e l o a d i n g
ADD8708 rev. 0 | page 8 of 1 6 1000 900 800 700 600 500 400 300 200 100 0 ? 0.30 ? 0.18 ? 0.10 ? 0.02 0.06 0.14 0.22 0.30 04614-009 gamma output error due to offset and resistor matching (% of fs) numbe r of amp l ifie rs f i gure 9. g a m m a o u tput v o ltage e rror 0.3 ? 0.3 ? 0.2 ? 0.1 0 0.1 0.2 012 3456789 1 0 1 1 1 2 max error each step typical unit b min error each step typical unit c typical unit a 04614-010 output channel e rror (%) f i gure 10. g a m m a o u tput e r r o r pe r c h ann e l ( 9 2 0 p a r t s ) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 17 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 04614-011 input voltage (v) output voltage (v) i load = 0ma i load = 5ma i load = 10ma f i g u re 11. d r opo u t char ac t e ris t i c s 0 100 200 300 400 500 600 700 800 900 1000 01234 56789 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 04614-012 output current (ma) d r o pou t volta ge ( m v) f i gure 12. d r opo u t v o ltag e v s . o u tput current 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 ? 2 5 ? 1 5 ? 5 5 1 5 2 53 54 55 56 5 7 58 59 5 1 0 5 1 1 5 04614-013 temperature ( c) d r o pou t volta ge ( m v) 10ma 5ma 0ma f i g u re 13. d r opo u t v o lt ag e v s . t e mpe r at ur e 14.5 14.4 14.3 14.2 14.1 14.0 13.9 13.8 13.7 13.6 0 2 4 6 8 1 01 2 1 41 61 8 2 0 04614-014 load current (ma) regulator output (v) ?20 c 0 c +25 c +55 c +85 c +95 c +105 c f i gure 1 4 . regula tor o u tput vs . i lo a d o v er t e mper ature
ADD8708 rev. 0 | page 9 of 1 6 14.45 14.40 14.35 14.30 14.25 14.20 ? 2 0 ? 1 0 0 1 02 03 04 0 5 06 07 08 09 0 1 0 0 1 1 0 04712-0-021 temperature ( c) regulator output (v) 10ma 5ma 0ma f i gure 1 5 . regula tor o u tput vs . t e m p er a t ure 04614-016 time (100 s/div) in pu t volta ge ( v ) outp ut v o ltage change (mv ) 17 18 15 16 400 200 0 ?200 ?400 14 c load = 1 f f i gur e 1 6 . regula tor li ne t r ansi ent r e sp o n se 04614-017 time (100 s/div) load curre nt (ma) outp ut v o ltage change (mv ) 0.1 ?4 0 ?2 0 0 20 40 5 c load = 1 f f i g u re 17. r e g u l a t o r l oad t r ans i ent r e s p ons e 12 0 1 2 3 4 5 6 7 8 9 10 11 0246 8 1 0 1 2 1 4 1 6 1 8 04614-018 supply voltage (v) s u p p l y curre nt (ma) f i gure 18. sup p l y current v s . sup p ly v o ltag e 11.0 10.4 10.5 10.6 10.7 10.8 10.9 ? 2 0 120 100 80 60 40 20 0 04614-019 temperature ( c) s u p p l y curre nt (ma) f i gure 19. sup p l y current v s . t e mper at ur e
ADD8708 rev. 0 | page 10 of 16 appli c ation notes the ad d8708 is a mask-p r o g r a mma b l e ga mma r e f e r e n c e g e n e ra t o r tha t a l lo ws so ur ce d r iv er s t o be o p t i mize d f o r th e dif f er en t com b ina t io n s o f liquid cr ys tals, g l as s sizes, e t c. in la rg e l c d p a nels. i t g e n e ra t e s 1 8 ga mma r e f e r e n c e o u t p u t s tha t c a n be mask-p r o g r a m m e d in 0.2 % in cr emen ts usin g t h e 500 ma t c h e d in ter n al r e sis t o r s (s ee f i gur e 20), s o tha t ev er y po i n t o n t h e cur v e ca n be ta r g et ed w i th in 0. 1% o f th e d e si r e d val u e . 04614-020 tap point 4 tap point 3 tap point 2 tap point 1 tap point 500 tap point 499 tap point 498 tap point 497 each r = 30 ? typically f i gur e 2 0 . 50 0 ma s k -p r o gr am ma ble r e si st or stri ng i n a typ i cal p a ne l a p p l ica t io n, t h e s e le c t e d s o ur ce dr i v ers ha v e a n i n t e r n a l ga m m a c u r v e t h a t is n o t i d e a l fo r t h e sp e c if ic p a n e l (s ee f i gur e 21). the ad d8708 al lo ws t h e ga mma c u r v e in the s o ur ce dr i v ers to be ad j u s t e d a p p r o p r i a t e l y , and als o en s u r e s tha t al l t h e s o urce dr i v ers ha v e t h e s a me ga mma c u r v e . 16 14 12 10 panel gamma curve corrected by ADD8708 original gamma curve in source drivers 8 6 4 2 0 04614-021 gamma reference input points gam m a voltage ( v ) f i g u re 21. o r ig in al and cor r ec t e d g a mm a cur v es the ma tchi n g and t r ack i ng acc u r a c y o f t h e in ter n a l r e sisto r s is ty p i c a l l y 0.1% wi t h w o rst-ca s e de v i a t ion f r o m t h e desir e d c u r v e wi thin 0.4 % o f th e ideal gamma c u r v e , o v er t e m p era t ur e . the ad d8708 als o in cl udes a l o w-dr o p o u t l i nea r r e gu la t o r t o p r o v ide a sta b le r e f e r e n c e le ve l f o r th e ga mma c u r v e f o r o p ti m u m pa n e l pe rf o r m a n c e . tap poi n t s e lection the ad d8708 us es a sin g le r e s i s t o r s t r i n g co n s is tin g o f 500 indivi d u al e l e m en ts. th e t a p p o in ts a r e mask p r og ra mma b l e a nd co m p le tely inde p e n d e n t o f e a ch o t h e r . s e e t h e t a p p o i n t a nd r e gu l a t o r v o l t a g e re q u es t f o r m in t h is da t a sh e e t . 04614-022 v reg out v out x v in x 500?tp x tp x f i gure 22. g a m m a buffers t a p p o int ci r c u i t t a p p o i n t vol t a g es ca n b e der i ve d f r o m t h e fol l o w i n g e q ua t i o n : out reg x out v tp x v = w h er e tp x is t h e desir e d t a p p o in t fo r t h e x th cha nnel. table 5. ty pical mask im ple m entation 1 v dd = 16 v , v re g o u t = 14.4 v , 0 x 500 tap point (x) voltage units v ou t 1 8 5 0 0 1 4 . 4 0 0 v v ou t 1 7 3 9 6 1 1 . 4 0 5 v v ou t 1 6 3 6 9 1 0 . 6 2 7 v v ou t 1 5 3 6 1 1 0 . 3 9 7 v v ou t 1 4 3 5 4 1 0 . 1 9 5 v v ou t 1 3 3 5 0 1 0 . 0 8 0 v v ou t 1 2 3 4 1 9 . 8 2 1 v v ou t 1 1 3 1 7 9 . 1 3 0 v v ou t 1 0 2 9 9 8 . 6 1 1 v v ou t 9 2 2 5 6 . 4 8 0 v v ou t 8 2 1 1 6 . 0 7 7 v v ou t 7 1 7 7 5 . 0 9 8 v v ou t 6 1 6 7 4 . 8 1 0 v v ou t 5 1 6 3 4 . 6 9 4 v v ou t 4 1 5 4 4 . 4 3 5 v v ou t 3 1 4 6 4 . 2 0 5 v v ou t 2 1 1 8 3 . 3 9 8 v v ou t 1 7 0 . 2 0 2 v _________ ___ _________ ___ _______ 1 ADD8708 r e lease samples do not ha v e these t y pical v a lu es. t h e v a lues on the s ampl e s are nonmonot onic and ca n be pr o v id ed upon r e q u est .
ADD8708 rev. 0 | page 11 of 16 voltage r e gulator t h e on - b o a rd v o lt age re g u l a tor pro v i d e s a re g u l a te d vo lt age to t h e r e sis t o r chai n t o p r o v ide s t ab le ga mma v o l t a g es. the t w o mask- p r o g r a mma b l e i n ter n a l r e sisto r s , r 1 a nd r 2 , a nd a r e fer e n c e v o l t a g e s e t t h e ou t p ut o f t h e r e g u la t o r . the typ i c a l val u es o f t h es e p a r t s a r e s h o w n i n f i gur e 23. i n addi t i on, s e e t h e t a p p o i n t an d r e gu la t o r v o l t a g e re q u e s t f o r m in t h is da ta sh ee t. 04614-023 v ref 1.2v + ? r 2 55k ? r 1 5k ? v reg out f i gure 2 3 . v o l t a g e regul a to r the in t e r n al r e s i s t o r s ha v e a typ i cal acc u rac y o f 0.1%. e x t e r n al r e sis t o r s ca n be us e d t o ad j u st t h e r e gu la t o r v o l t a g e; h o we v e r , i t is n o t r e co mm e n de d . p l e a s e con t ac t yo ur lo cal s a les o f f i ce f o r fu r t h e r d e ta il s . maximum power dissipation the maxim u m s a f e p o w e r dis s i p a t io n in t h e ad d8708 p a c k a g e i s l i m i t e d b y t h e a s soci a t ed ri se in j u n c ti o n t e m p e r a t ur e (t j ) o n th e die . a t a p p r o x ima t e l y 150c, the g l as s tra n si tio n tem p era- t u r e , t h e p r o p er t i es o f t h e plas t i c cha n g e . e v en tem p o r a r i l y exce e d in g t h is tem p er a t ur e l i mi t ma y cha n g e t h e s t r e s s es t h a t t h e p a cka g e exer ts o n t h e di e , p e r m a n e n t l y s h if t i n g t h e p a ra- m e tr ic p e r f o r ma n c e o f t h e ADD8708. e x ceedin g a j u n c tion t e m p era t ur e o f 175c f o r a n ext e nded p e r i o d can r e s u l t in c h a n g e s in the silico n de vices, p o t e n t ial l y c a usin g fa il ur e . lan d p a ttern the lfcs p p a cka g e com e s w i t h a t h er mal p a d. s o lder in g do w n t h is t h er ma l p a d dr a m a t ic a l ly i m p r o v es t h e h e a t di ssi p a t io n o f th e pa ck a g e . i t is n e ce ssa r y t o a t ta c h vi a s th a t co n n ec t t h e s o lder e d t h er mal p a d t o an o t h e r la yer o n t h e b o a r d . this p r ov i d e s a n av e n u e t o d i s s i p a t e t h e h e at aw ay f r o m t h e p a r t . w i th o u t v i a s , th e h e a t i s i s o l a t ed d i r e ct l y u n d e r t h e pa rt . s u b d ivi d e t h e s o lder p a s t e , o r s t en c i l l a yer , fo r th e t h er mal p a d t o r e d u ce s o lder b a l l in g and spl a t t e r . i t is n o t cr i t ic a l h o w t h e s u b d i v i s i o n s a r e a r r a n g e d , a s l o n g a s th e t o ta l co v e r a g e o f th e s o lder p a s t e fo r t h e t h er mal p a d is g r e a t e r t h a n 50%. th e land p a t t er n is cr i t i c a l to h e a t dissi p a t io n. a sug g este d land p a t t er n is sh ow n i n fi g u re 2 2 . the t h er mal p a d is a t tach e d t o th e s u bs tra t e . i n th e ad d8708, th e s u bs tra t e i s co n n ec t e d t o v dd . t o be e l ectricall y sa f e , th e th er ma l p a d sho u ld be s o lder e d t o a n a r e a o n t h e bo a r d tha t is e l ectri c all y i s o l a t ed o r co nn ect e d t o v dd . a t t a c h i n g th e th e r m a l p a d to g r ou n d a d ve r s ely af f e c t s t h e p e r f or m a nc e of t h e p a r t .
ADD8708 rev. 0 | page 12 of 16 operating temperature range the junction temperature is as follows: t j = t amb + ja p dis where: t amb = ambient temperature. ja = junction-to-ambient thermal resistance, in c/watt. p dis = power dissipated in the device, in watts. for the ADD8708, p dis can be calculated by this equation: p dis = v dd i dq + ( i out x(+) ( v dd ? v out x )) + (? i out x(?) v out x ) + (v dd C v reg out ) i load where: v dd i dq = nominal system power requirements. i out x(+) ( v dd ? v out x )= positive-current amplifier load power dissipation (current comes from v dd ). ?i out x(?) v out x = negative-current amplifier load power dissipation (current goes to gnd). ( v dd C v reg out ) i load = regulator load power dissipation. in this example, t amb = 95c. to calculate p dis , assume the values in table 6. table 6. v out x (v) i out x (ma) p (w) v out 18 14.400 4.3 0.00688 v out 17 11.405 5.2 0.0239 v out 16 10.627 ?4.4 0.0468 v out 15 10.397 7.3 0.0409 v out 14 10.195 7.6 0.0441 v out 13 10.080 ?3.9 0.0393 v out 12 9.821 8.3 0.0513 v out 11 9.130 7.9 0.0543 v out 10 8.611 ?4.5 0.0389 v out 9 6.480 ?4.2 0.0272 v out 8 6.077 5.6 0.0556 v out 7 5.098 ?3.3 0.0168 v out 6 4.810 ?6.9 0.0332 v out 5 4.694 5.7 0.0644 v out 4 4.435 3.5 0.0405 v out 3 4.205 9.6 0.113 v out 2 3.398 ?9.5 0.0323 v out 1 0.202 ?7.2 0.00145 ( i out (+) ( v dd ? v out )) + ( ?i out x( ? ) v out ) 0.731 v dd i dq = 16 v 15 ma = 0.240 w ( v dd C v reg out ) i load = (16 v C 14.4 v) 5 ma = 0.008 w p dis = 0.240 w + 0.731 w + 0.008 w =0.979 w example 1 exposed pad soldered down with via ja = 28.3c/w: t j = 95c + (28.3c/w) (0.979 w) = 122.7c where 150c is the maximum junction temperature that is guaranteed before the part breaks down. the maximum process limit is 125c. because t j is < 150c and < 125c, this example demonstrates a condition where the part should perform within process limits. example 2 exposed pad not soldered down ja = 47.7c/w: t j = 95c + (47.7c/w) (0.979 w) = 141.7c in this example, t j is < 150c but > 125c. although the part should not exhibit any damage in this situation, the process limits have been exceeded. the part may no longer operate as intended. these examples show that soldering down the exposed pad is important for proper heat dissipation. under the same power- up and loading conditions, the unsoldered part has a higher temperature than the soldered part. therefore, it is strongly advised that the exposed pad be soldered to v dd to maintain part integrity.
ADD8708 rev. 0 | page 13 of 16 04614-024 1.60mm 1.90mm 5.93mm 5.78mm 7.31mm 5.40mm 0.69mm 0.075mm 0.28mm 0.075mm 0.5mm 0.33mm diameter thermal via heat sink solder paste area 1.60mm f i gur e 2 4 . 48 -p in lf csp ( c p - 4 8 ) la nd p a tte r n dim ensio n s sho wn i n m i ll im e t e r s no t e s : 1. ar e a s in black rep r es en t t h e b o a r d met a l l i z a t ion. 2. ar e a s in w h i t e r e p r es en t t h e s o l d er mas k and v i as. 3. h a tc he d are a i s for t h e he a t s i n k s o l d e r p a ste. 4. the t h er mal p a d is e l e c t r i c al l y ac t i v e . th e s o lder mas k o p e n i n g s h o u l d b e 0.1 50 mm la rg er t h a n t h e p a d size , r e s u l t in g i n 0.07 5 mm o f c l ea ra n c e betw ee n t h e co p p er pa d a n d so l d er m a s k .
ADD8708 rev. 0 | page 14 of 16 typical a p plicati ons circuit 04614-025 gnd gnd v dd 16v gamma buffers 1.2v + ? v out 18 v out 17 v out 16 v out 15 v out 14 v out 13 v out 12 v out 11 v out 10 v out 9 v out 8 v out 7 v out 6 v out 5 v out 4 v out 3 v out 2 v out 1 0 ? 3.12k ? 810 ? 240 ? 210 ? 120 ? 270 ? 720 ? 540 ? 2.22k ? 420 ? 1.02k ? 300 ? 120 ? 270 ? 240 ? 840 ? 3.33k ? 210 ? 14.400v 11.405v 10.627v 10.397v 10.195v 10.080v 9.821v 9.130v 8.611v 6.480v 6.077v 5.098v 4.810v 4.694v 4.435v 4.205v 3.398v 0.202v v in 18 v in 17 v in 16 v in 15 v in 14 v in 13 v in 12 v in 11 v in 10 v in 9 v in 8 v in 7 v in 6 v in 5 v in 4 v in 3 v in 2 v in 1 tp18 = 500 tp17 = 396 tp16 = 369 tp15 = 361 tp14 = 354 tp13 = 350 tp12 = 341 tp11 = 317 tp10 = 299 tp9 = 225 tp8 = 211 tp7 = 177 tp6 = 167 tp5 = 163 tp4 = 154 tp3 = 146 tp2 = 118 tp1 = 7 fb normally open normally open 55k ? 700 ? 5k ? voltage regulator v reg out 0.1 f gamma 17 gamma 16 gamma 18 gamma 15 gamma 14 gamma 13 gamma 12 gamma 11 gamma 10 gamma 9 gamma 8 gamma 7 gamma 6 gamma 5 gamma 4 gamma 3 gamma 2 gamma 1 gamma 17 gamma 16 gamma 18 gamma 15 gamma 14 gamma 13 gamma 12 gamma 11 gamma 10 gamma 9 gamma 8 gamma 7 gamma 6 gamma 5 gamma 4 gamma 3 gamma 2 gamma 1 gamma 17 gamma 16 gamma 18 gamma 15 gamma 14 gamma 13 gamma 12 gamma 11 gamma 10 gamma 9 gamma 8 gamma 7 gamma 6 gamma 5 gamma 4 gamma 3 gamma 2 gamma 1 0.1 f 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? 700 ? esd protection resistors esd protection resistor f i gure 25. t y pic a l a p plic at ion cir c u i t
ADD8708 rev. 0 | page 15 of 16 tap point and re gulator voltage request form regulator sectionv reg out t o e n su re c o r r e c t re g u l a tor op e r a t i o n v dd m u s t e x ceed v reg b y 600 mv minim u mtha t is, a v reg = 14.4 v r e q u ir es a minim u m v dd = 15.0 v . parameter value (6.9 v C 1 5 .4 v) v re g out tap poi n t s e ctio n g a m m a output volt age s are c a l c u l a t e d u s i n g t h e fol l o w i n g for m u l a : 500 out reg out v tp v = a micr os o f t? e x ce l sp r e adsh e e t is a v a i la b l e w h ich a u t o ma t i cal l y calc u l a t es t h e b e s t t a p p o in t b a s e d o n v reg o u t a nd t h e des i r e d o u t p ut vol t a g es fo r e a ch ga mma ou t p ut. ou tpu t tap point v out 18 v out 17 v out 16 v out 15 v out 14 v out 13 v out 12 v out 11 v out 10 v out 9 v out 8 v out 7 v out 6 v out 5 v out 4 v out 3 v out 2 v out 1 cust o m er in fo rmat ion name: ____________________________________________ company: ____________________________________________ addres s: ____________________________________________ ____________________________________________ date: ____________________________________________ plea se r e t u r n t h i s f o r m t o yo u r loc a l sa les o f fic e.
ADD8708 rev. 0 | page 16 of 16 outline dimensions pin 1 indicator top view 6.75 bsc sq 7.00 bsc sq 1 48 12 13 37 36 24 25 5.25 5.10 sq 4.95 0.50 0.40 0.30 0.30 0.23 0.18 0.50 bsc 12 max 0.20 ref 0.80 max 0.65 typ 1.00 0.85 0.80 5.50 ref 0.05 max 0.02 nom 0.60 max 0.60 max pin 1 indicator coplanarity 0.08 seating plane 0.25 min exposed pad (bo tt om view) compliant to jedec standards mo-220-vkkd-2 f i gure 26. 4 8 -l ead l e ad f r a m e ch ip s c a l e p a ck ag e [lfcs p ] 7 mm 7 m m b o d y (c p - 4 8 ) di me nsio ns sho w n i n mi ll im e t e r s top view (pins down) 1 12 13 25 24 36 37 48 0.27 0.22 0.17 0.50 bsc 7.00 bsc sq seating plane 1.60 max 0.75 0.60 0.45 view a 9.00 bsc sq pin 1 0.20 0.09 1.45 1.40 1.35 0.08 max coplanarity view a rotated 90 ccw seating plane 10 6 2 7 3. 5 0 0.15 0.05 compliant to jedec standards ms-026bbc f i g u re 27. 4 8 -l ead l o w p r of i l e q u ad f l at p a ckag e [l qf p ] (st - 48) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model 1 temperature r a nge package descri ption package option ADD8708wcpz- reel7 2 C40c to +105c 48-lead lead fr ame chip scale package cp-48 ADD8708wstz- reel 2 C40c to +105c 48-lead low pr ofile quad flat package st-48 1 ava i l a b le i n re el s o n ly. 2 z = pb-free part. ? 2004 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . d04614C0C 10/04(0)


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